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FEATURES Eight Differential Line Receivers in One Package Meets EIA Standard EIA-232E, 423A, 422A and CCITT V.10, V.11, V.28 Single +5 V Supply Differential Inputs Withstand 25 V Internal Hysteresis Low Power CMOS -3.5 mA Supply Current TTL/CMOS Compatible Outputs Available in 28-Pin DIP and PLCC Packages Low Power Replacement for UC5180C/NE5180 APPLICATIONS High Speed Communication Computer I-O Ports Peripherals High Speed Modems Printers Logic Level Translation
Octal, RS-232/RS-423 Line Receiver ADM5180
FUNCTIONAL BLOCK DIAGRAM
ADM5180
A- A A+ AO
B- B B+ BO
C- C C+ CO
D- D D+ FS1 FS2 E- DO
GENERAL DESCRIPTION The ADM5180 is an octal differential line receiver suitable for a wide range of digital communication systems with data rates up to 200 kB/s. Input signals conforming to EIA Standards 232-E, 422A and CCITT V.10, V.11, V.28, X.26, and X.27 are accepted and translated into TTL /CMOS output signal levels. The ADM5180 is a superior upgrade for the UC5180C and the NE5180. It is fabricated on an advanced BiCMOS process, allowing high speed bipolar circuitry to be combined with low power CMOS. This minimizes the power consumption to less than 25 mW. A failsafe function ensures a known output state under a variety of input fault conditions as defined in RS-422A and RS-423A. The failsafe function is controlled by FS1 and FS2. Each controls four receivers. With FS = Low and a fault condition the output is forced low while if FS = High, the output is forced high. The device is available in both 28-pin DIP and 28-lead PLCC packages.
E E+
EO
F- F F+ FO
G- G G+ GO
H- H H+ HO
Truth Table Differential Input (+) - (-) >200 mV <-200 mV O/C S/C O/C S/C Failsafe Input FS1, FS2 X X L L H H Receiver Logic Output H L L L H H
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
ADM5180-SPECIFICATIONS (V T
Parameter POWER REQUIREMENTS VDD IDD INPUTS Input Resistance, RIN Differential Input High Threshold, V TH Differential Input Low Threshold, V TL Hysteresis, VH Open Circuit Input Voltage, V IOC Input Capacitance Input Current, IIN OUTPUTS High Level Output Voltage,V OH Low Level Output Voltage ,V OL Short Circuit O/P Current, IOS FAILSAFE FUNCTION Failsafe Output Voltage, V OFS Min 4.75 3.5 3 50 -200 -400 50 Typ
DD
MAX
= +5 V 5%, Input Common-Mode Range = 7 V. All Specifications TMIN to unless otherwise noted.)
Units V mA k mV mV mV mV mV mV pF mA mA V V V mA 3 V |VIN| 25 V RS = 0 , VOUT = 2.7 V, I OUT = -440 A, See Figure 1 RS = 500 , VOUT = 2.7 V, I OUT = -440 A, See Figure 1 RS = 0 , VOUT = 0.45 V, IOUT = 8 mA, See Figure 1 RS = 500 , VOUT = 0.45 V, IOUT = 8 mA, See Figure 1 FS1, FS2 = 0 V or VDD, See Figure 1 Test Conditions/Comments
Max 5.25 5 7 200 400 -50 140 60 20 3.25
-3.25 2.7 0.4 0.45 100
VIN = +10 V VIN = -10 V VID = 1.0 V, IOUT = -440 A VID = -1.0 V, IOUT = 4 mA VID = -1.0 V, IOUT = 8 mA, TA = 0C to +70C Note 1 Inputs Open or Shorted Together or One Input Open and One Grounded 0 IOUT 4 mA; FS1, FS2 = 0 V 0 IOUT 8 mA, TA = 0C to +70C; FS1, FS2 = 0 V 0 IOUT -400 A; FS1, FS2 = V DD
0.40 0.45 FS1, FS2 Input Current
NOTE 1 Only one output may be shorted at any time. Specifications subject to change without notice.
2.7 -10
+10
V V V A
TIMING CHARACTERISTICS (V
Parameter Propagation Delay-Low to High Propagation Delay-High to Low Acceptable Input Frequency Rejectable Input Frequency
Specifications subject to change without notice.
DD
= +5 V 5%. All Specifications TMIN to TMAX unless otherwise noted)
Typ Max 550 550 0.1 Units ns ns MHz MHz Test Conditions/Comments CL = 50 pF, V IN = 500 mV CL = 50 pF, V IN = 500 mV Unused Input Grounded, V IN = 200 mV Unused Input Grounded, V IN = 500 mW
Min
5.5
-2-
REV. 0
ADM5180
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25C unless otherwise noted)
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . +15 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V Failsafe Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VCC Output Short Circuit Duration . . . . . . . . . . . . . . . . . Continuous2 Power Dissipation Plastic DIP . . . . . . . . . . . . . . . . . . . . 1250 mW (Derate at 12.5 mW/C Above +50C) JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . 75C/W Power Dissipation PLCC . . . . . . . . . . . . . . . . . . . . . . . 1000 mW (Derate at 12.5 mW/C Above +50C) JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . +80C/W
Operating Temperature Range Commercial ( J Version) . . . . . . . . . . . . . . . . . . . 0C to +70C Industrial (A Version) . . . . . . . . . . . . . . . . . . . -40C to +80C Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . . . . +300C Vapour Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
NOTES 1 This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. 2 Only one output should be shorted at any time.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM5180 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
W
WARNING!
ESD SENSITIVE DEVICE
VOUT FS = VDD FS = GND
(VIN+) - (VIN-) 50%
tPLH
tPHL
OUTPUT
50%
VH1
VH2
Figure 3. Timing Waveform
VTL1 VTH1 0 VTL2 VTH2 VIN
Figure 1. VTL, VTH, VH Definition
8mA
ORDERING GUIDE
TO OUTPUT PIN 50pF 440A +2.1V
Model ADM5180JN ADM5180AN ADM5180JP ADM5180AP
Temperature Range 0C to +70C -40C to +85C 0C to +70C -40C to +85C
Package Option N-28 N-28 P-28A P-28A
Figure 2. Timing Test Load
REV. 0
-3-
ADM5180
PIN CONFIGURATIONS DIP
A- A+ AO B- B+ BO FS1 C- C+ CO 1 2 3 4 5 6 7 8 9 10 28 VDD 27 HO 26 H+
APPLICATIONS INFORMATION
FAILSAFE OPERATION The ADM5180 provides a failsafe operating mode to guard against input fault conditions as defined in RS-422A and RS-423A standards. The fault conditions are (1) Driver in power-off condition, (2) Receiver not interconnected with Driver, (3) Opencircuited interconnecting cable, and (4) Short-circuited interconnecting cable. If any of these four fault conditions occurs at the inputs of a receiver, then the output of that receiver is driven to a known logic level. The failsafe level is programmed using the failsafe (FS) input. There are two failsafe inputs, FS1 and FS2 which each control four receivers. FSI controls receivers A . . . D and FS2 controls receivers E . . . H. A connection to V DD on the failsafe input sets the output high under fault conditions while a connection to GND sets the output low. FS1, FS2 VDD GND Output During Fault Condition High Low
25 H- 24 GO 23 G+ 22 G- TOP VIEW (Not to Scale) 21 FS2 20 FO 19 F+ 18 F- 17 EO
ADM5180
D- 11 D+ 12 DO 13
16 E+ 15 E-
GND 14
PLCC Input Filtering The ADM5180 contains internal low pass filtering for additional noise rejection. Frequencies above the passband will be rejected. For the specified input (5.5 MHz at 500 mV) the input stage attenuates the signal such that the threshold levels are not reached and therefore no change of state occurs on the output. The filtering is a function of both amplitude and and frequency. As the signal amplitude decreases then the rejected frequency will decrease.
VDD AO HO A+ A- B- H+
25 H- 24 GO 23 G+ 22 G- 21 FS2 20 FO 19 F+ 12 13 14 15 16 17 18
4 B+ BO FS1 C- C+ 5 6 7 8 9
3
2
1
28 27 26
ADM5180
TOP VIEW (Not to Scale)
CO 10 D- 11
DO
GND
E-
EO
E+
PIN DESCRIPTION Mnemonic VDD GND A+ . . . H+ A- . . . H- A O . . . HO Function Power Supply Input, 5 V 5%. Ground Pin. Must be connected to 0 V. Noninverting Input to Differential Receivers A to H. Inverting Input to Differential Receivers A to H. Receiver Outputs A to H. A through D and FS2 controls receivers E through H. Failsafe Control Inputs. FS1 controls receivers A through D and FS2 control Receiver E through H.
FS1, FS2
D+
F-
-4-
REV. 0
ADM5180
VDD VH VL INPUT +V -V VH
1/8 ADM5170
RS232/RS423A TRANSMISSION
+
1/8 ADM5180
VL
VOUT
-
VFAILSAFE TIE TO GND FOR RS232
Figure 4. EIA-232/V.28 Data Transmission
VDD +V VH VL INPUT +V RS422A/V.11 LINE DRIVER -V VFAILSAFE -V
VH
+
RS422 TRANSMISSION
+
1/8 ADM5180
VL
-
VOUT
-
Figure 5. RS-422A/V.11 Data Transmission
Typical Performance Characteristics
4.0 VDD = 5V FS = 5V VID = O/C
5.5
3.8
TA = +25C FS = 0V VID = O/C
5.3
IDD - mA
3.6
3.4
VDD - V
-20 0 20 40 60 80
5.1
4.9
3.2
4.7
3.0 -40
4.5 3.35
3.40 IDD - mA
3.45
3.50
TEMPERATURE - C
Figure 6. Supply Current vs. Temperature
Figure 7. Supply Current vs. Supply Voltage
REV. 0
-5-
ADM5180
500 TpLH 6 400 7 VDD = 5V FS = 0V TA = +25C
PROPAGATION DELAY - ns
300
VDD = 5V FS = 0V f = 100kHz TA = +25C
Vpp - V (VID = Vpp/2)
TpHL
5
4 3
200
CL = 50pF
2 1
100
0 0 1 2 3 4 5 Vpp - V (VID = Vpp/2)
0 0 1 2 3 4 REJECTABLE INPUT FREQUENCY - MHz
Figure 8. Propagation Delay vs. Amplitude
Figure 10. Rejectable Input Frequency vs. Amplitude
5.0 VDD = 5V TA = +25C 4.8
1000 VDD = 5V FS = 0V VID = 1V TA = +25C
800
4.6
VOL - mV
VOH - V
600
4.4
400
4.2
200
4.0
3.8 0 1 2 IOH - mA 3 4 5
0 0 10 IOL - mA 20 30
Figure 9. High Level Output Voltage vs. Output Source Current
Figure 11. Low Level Output Voltage vs. Output Sink Current
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Lead Plastic DIP (N Suffix)
28 15 0.580 (14.73) 0.485 (12.32) 1 1.565 (39.70) 1.380 (35.10) 0.250 (6.35) MAX 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC 0.625 (15.87) 0.600 (15.24) 0.195 (4.95) 0.125 (3.18) 0.015 (0.381) 0.008 (0.204) 0.070 (1.77) MAX 14
28-Lead Plastic Leaded Chip Carrier (PLCC) (P Suffix)
0.180 (4.57) 0.165 (4.19)
PIN 1
0.048 (1.21) 0.042 (1.07) 5
4 PIN 1 IDENTIFIER
26 25 0.021 (0.53) 0.013 (0.33) 0.430 (10.92) 0.390 (9.91) 0.032 (0.81) 0.026 (0.66)
0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN
0.050 (1.27) BSC
TOP VIEW
11
19 12 0.456 (11.58) 0.450 (11.43)SQ 0.495 (12.57) 0.485 (12.32) SQ 0.110 (2.79) 0.085 (2.16) 18 0.040 (1.01) 0.025 (0.64)
SEATING PLANE
0.020 (0.50) R
-6-
REV. 0
PRINTED IN U.S.A.
0.048 (1.21) 0.042 (1.07)
0.056 (1.42) 0.042 (1.07)
0.025 (0.63) 0.015 (0.38)
C1854-7.5-10/93


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